The present invention is directed to booting of a system-on-chip (SOC) and, more particularly, to adjustments to boot interface frequency when the SOC boots from an external memory.
An SOC often includes a processing core that boots from an external memory, such as a NOR flash or other type of flash memory. Typically, the processing core will be in communication with a flash memory controller that is connected to the external memory by an interface bus. However, during the boot process, the memory interface speed is unknown to the SOC. Memory interface speeds can vary from system to system, so the interface controller must be run at the slowest speed during booting.
Running the interface controller at the slowest possible speed has numerous drawbacks, not the least of which is the clear fact that booting will be slow. It also under-utilizes system capabilities, as the default interface frequency is the same for all external memories, regardless of the memory speed. However, increasing the default boot frequency can result in failures when reading external memories with longer delays. In general, selecting a default interface frequency is a challenge because the SOC input clock, board delays, and memory access times can vary from system to system.
It is therefore desirable to provide a system and method for adjusting the frequency of a boot interface to an external memory that allows for both fast and reliable booting.